This invention relates to programmable logic resources. More particularly, this invention relates to providing error detection on programmable logic resources.
A programmable logic resource is a general-purpose integrated circuit that is programmable to perform any of a wide range of logic tasks. Known examples of programmable logic resources include programmable logic devices (PLDs) and field-programmable gate arrays (FPGAs). Memory blocks are provided on programmable logic resources and can be used to store and subsequently output data, or to perform various functions desired by the user.
Data can be stored in memory blocks as programmable logic resource configuration data. When data is being programmed into the memory blocks or while the data is stored in the memory blocks, errors can occur in the representation of the programmable logic resource configuration data. Such errors can include hard errors and soft errors. Hard errors arise due to physical imperfections in a programmable logic resource or due to physical damage to a programmable logic resource. A soft error occurs when, during operation of a programmable logic resource, an alpha particle or cosmic ray strikes the silicon of the programmable logic resource, causing the formation of electron-hole pairs that alters the content of a memory cell. Programmable logic resources, because of their large number of small-capacitance memory nodes, are particularly susceptible to soft errors. A soft error directly affects the logic functionality of the programmable logic resource, thereby causing logic failure. Currently, there are no available methods for detecting such errors in programmable logic resources.
In view of the foregoing, it would be desirable to provide systems and methods for detecting errors in programmable logic resources.